Large-scale HPC simulations with their inherent I/O bottleneck have made in situ visualization an essential approach for big data analysis. The International Workshop on In Situ Visualization (WOIV) provides a venue for speakers to share and exchange practical expertise and experience with methods, workflows and applications.
For this 4th edition of the workshop, submissions are encouraged on approaches that did not deliver the anticipated results or did not live up to their expectations. Here, a focus is expected to be on first-hand reports on lessons learned, discussing potential reasons why the approach did not work out as originally intended. In general, speakers should detail if and how the application drove abstractions or other kinds of data reductions and how these interacted with the expressiveness and flexibility of the visualization for exploratory analysis.
The workshop brings together a wide-ranging audience of visualization scientists, computational scientists, and simulation developers, who are involved in the development, deployment, or maintenance of in situ visualization approaches on HPC infrastructures. The main focus of the workshop is to provide practical insights that serve as inspiration for attendees to develop, refine and avoid pitfalls in their own HPC environments. In addition, submissions are encouraged that present currently open practical challenges in big data analysis and discuss potential solution approaches.
Areas of interest for WOIV include, but are not limited to:
In situ infrastructures
- Current Systems: production quality, research prototypes
- Successful and unsuccessful approaches, dead ends
- Opportunities / Gaps
- Best practices
- Analysis: feature detection, statistical methods, temporal methods, geometric methods
- Visualization: information visualization, scientific visualization, visual analytics
- Learning-based approaches
- Data reduction / compression
- Examples/case studies of solving a specific scientific challenge with in situ methods / infrastructure.
- Integration: data modeling, software-engineering
- Resilience: error detection, fault recovery
- Workflows for supporting complex in situ processing pipelines
System resources, hardware, and emerging architectures
- Enabling Hardware
- Hardware and architectures that provide opportunities for in situ processing, such as burst buffers, staging computations on I/O nodes, sharing cores within a node for both simulation and in situ processing
- Preservation of important elements
- Significant reduction of the data size
- Flexibility for post-processing exploration
Held in conjunction with ISC High Performance 2019: The Event for High Performance Computing, Networking and Storage http://www.isc-hpc.com/